The invention relates to monolithic integrated circuit (IC) devices in which provision is made for either isolating or connecting vertically arrayed transistors to the IC substrate. This is ordinarily done using a heavily doped substrate wafer that is overcoated with an epitaxial isolation layer of the opposite conductivity type. A second epitaxial layer on top of the first, and of opposite conductivity type thereto, is employed as the material is which conventional double diffused transistors and other components are created. Conventional isolation diffusion and buried layers are also employed. For those transistors destined to be electrically connected to the substrate a buried layer extending completely through the epitaxial isolation layer is employed. This structure and the method for making it are disclosed in U.S. Pat. No. 4,046,605 to Carl T. Nelson and Brian E. Hollins. This patent further discloses a buried layer located so as to span the isolation layer in those regions where the IC is to be scribed and fractured into individual circuit chips.